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Self-Tuning Chips Cut EPC Costs
A semiconductor maker joins the RFID market and promises to drop the price of Electronic Product Code RFID tags by using tunable transistors.
Feb 18, 2004—Seattle-based semiconductor maker Impinj has entered the RFID market with a new RFID tag design that the company says will deliver Electronic Product Code (EPC) tags costing 25 percent less than traditional tag designs.
Although announcing its RFID designs for the first time, the company says it has played a key role in the development of EPCglobal’s awaited Class 1 Gen 2 standard and that Impinj cofounder Chris Diorio has been appointed cochairman of the EPCglobal hardware action group (HAG). Since joining EPCglobal’s predecessor, the Auto-ID Center, last year, the company says its involvement in the development of EPC has already won customer interest in its RFID plans.
Formed three years ago, the company recorded the first sales of its technology last year with an $11 million research-and-development contract from the Defense Advanced Research Projects Agency (DARPA), the agency in charge of technological development for the U.S. Department of Defense. Although Impinj can’t divulge details about its work for the DOD, the company says the project involves a communications system using that Impinj calls Self-Adaptive Silicon: microchips made with tunable transistors. A built-in fine-tuning mechanism allows a tunable transistor to self-correct for a range of variables such as deviations in the manufacturing process and changes in temperature. A chip that doesn’t use the Self-Adaptive Silicon design needs to have large and complex compensating circuits that increase the chip’s die size and power consumption.
The tunable transistor also keeps its setting until tuned again, even when the power supply is removed from the chip—a property called non-volatile memory. Tunable transistors, therefore, are key to Impinj’s AEON (Advanced Erasable On-chip Non-volatile Memory) design, which enables the memory portion of its RFID chips. AEON operates at very low power, allowing Impinj to create RFID chips with similar read and write ranges and therefore a longer overall operating range (typically, RFID chips have a write range that is at least 50 percent shorter than their read range).
Impinj maintains that its Self-Adaptive Silicon and AEON technologies will form the backbone for RFID products that will quickly form the company’s primary revenue stream. Demonstration versions of its tags and readers are set to ship in the third quarter of this year and will adhere to the EPC Class 1 Gen 2 standard.
Impinj’s says its tags will be made using CMOS (complementary metal-oxide semiconductor) construction, a type of integrated circuit fabrication process for creating microchips that require very little energy. The ability to use CMOS means that construction costs will be significantly less than that for current EEPROM (electrically erasable programmable read-only memory) chip designs. Tags that are programmable in the field (such as EPC Class 1) or rewritable at will (EPC Class 2) typically use EEPROM instead of CMOS.
“CMOS is the lowest-cost silicon processing you can imagine,” says Dimitri Desmons, director of RFID products at Impinj. The company won’t say how much it will charge for it tags, but it says that its tags should always be 25 percent cheaper to manufacture than rival designs.
Impinj says that its designs can also be easily modified to accommodate the current most common and therefore cheapest manufacturing process. The company claims its designs have already proved to be portable from fabrication plant to fabrication plant, so that production can be moved to the most cost-effective manufacturer. That flexibility fits in with Impinj’s plan to sell the tags—and readers that support them—while contracting third-party manufacturers to build its products.
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