The Longer the UII, the Slower the Read Rate

By Patrick King

Feb. 1, 2010—Before there was an ISO-18000-6c/EPC Gen 2 RFID standard, there were ISO 18000-6a and ISO 18000-6b. Both of those older standards had two memory banks; the first bank was encoded with a TID (tag ID) number, programmed by the chip manufacturer and locked, while the second was intended for user memory, with 2 kilobits available for 18000-6b tags. Not only was a TID a unique serial ID number, it was also the first section of memory read in the initial exchange between a tag and an interrogator. To avoid reading the wrong tag, or having signals from multiple tags interfere with each other (which is called collision), it was very important for the TID to be unique and small in size.

Companies using 18000-6a and 18000-6b chips often asked, "Can I have my number placed in TID?" In 2002, this basic need launched the Electronic Product Code (EPC) and ISO 18000-6c standards, with four memory banks. ISO 18000-6c chips still have a TID, but this memory bank no longer controls anticollision or wake-up functions. Those two features are assigned to Memory Bank 01 (MB01), which is the unique ID or EPC—typically, 96 bits in size—and there is also the same user memory bank as before (MB11), as well as a final reserved memory bank.


In early 2009, NXP Semiconductors and Alien Technology began to manufacture commercial EPC Gen 2 chips with 512 additional bits available. The added memory was chiefly designed to allow programming of user memory (MB11); however, one additional feature allowed for significant expansion of the UII (unique ID) Memory Bank 01. More recently, tags with up to 64 kilobits are emerging that place additional stress on choosing how to allocate certain percentages of those bits.

Until this point, a Gen 2 chip only had sufficient memory to encode a 96-bit EPC number within its MB01. Even though the ISO-18000-6c specification clearly describes four candidate memory banks, and denotes MB11 as assigned to user memory, a new debate has emerged regarding whether it is better to use these additional bits to extend MB01, or to designate the additional capability within MB11 only. The nature of the debate was not whether a chip supplier should allow the features of variable assignment of memory, but rather how to maintain high levels of interchangeability among users in any particular industry, and how to assure that the choices made do not complicate certain application processes. Simply stated, if one group places 254 bits into MB01 and nothing into MB11, while a second group places 96 bits in MB01 and the remainder in MB11, what could be the impact?

Michelin suspected that efforts to continuously expand UII MB01 memory could negatively impact performance for certain situations, and undermine many of the elegant features imagined by maintaining a simple unique serial number in MB01. In an effort to resolve this dispute, the company commissioned CISC Semiconductor Design+Consulting GmbH, located in Klagenfurt, Austria, to carry out a study to determine whether data beyond a 96-bit unique ID was best placed in MB01 or in MB11. The tire maker imagined that in an environment containing multiple automotive components (including tires), rapid and correct data capture would be key. Additionally, in applications such as reading a tire in motion, the need for a simple serial ID was considered paramount, but needed to be proven.

CISC is a design and consulting service company for industries developing embedded microelectronic systems, with a particular focus on automotive and RFID systems. The firm offers systems for testing RFID conformance and performance, as well as product and application design, according to the ISO and EPCglobal standards. CISC carried out the Michelin-commissioned study in fall 2009, utilizing its CISC RFID ASD (Application and System Design) Kit+Library, developed over the past five years to support RFID product and system design—in particular, for ISO 18000-6b, ISO 18000-6c (EPC Gen 2 UHF) and EPC Gen 2 HF.